1. Field of the Invention
The present invention relates to analog signal processing stages and, more particularly, to a differential analog signal processing stage with reduced even order harmonic distortion.
2. Description of the Related Art
An analog-to-digital converter (ADC) is an electronic circuit that converts an analog input signal into a corresponding digital code that represents the magnitude of the analog input signal. ADCs commonly include a switched capacitor circuit that includes a first switch, a capacitor with a first plate that is connected to the first switch, and a second switch that is connected to a second plate of the capacitor.
In operation, the first switch and the second switch close simultaneously, while the second switch opens right before the first switch opens to minimize signal dependent distortion that is introduced by the switching. When the first and second switches close, a differential analog signal processing stage drives a voltage onto the capacitor that represents the magnitude of the analog input signal at the input to the differential analog signal processing stage. The voltage on the capacitor is sampled the moment the second switch opens. The sampled voltage is then sensed and converted into a digital value.
Differential signal processing is widely used in high-performance analog signal path design to improve the common mode rejection ratio and increase the analog signal dynamic range by two times (at the expense of increased power consumption). An analog signal is single-ended by nature, and has to be converted into a differential signal at some point on the analog signal path. An early conversion of the analog signal into the differential signal is preferred for high performance.
A differential analog signal processing stage includes a single-to-differential amplifier, an anti-aliasing filter that is connected to the single-to-differential amplifier, and a pseudo differential amplifier that is connected to the anti-aliasing filter. The single-to-differential amplifier outputs a positive differential signal and a negative differential signal in response to the analog input signal.
The positive and negative differential signals are filtered by the anti-aliasing filter. The pseudo differential amplifier drives the filtered positive and negative differential signals out to the differential switched capacitor circuit. The pseudo differential amplifier commonly utilizes a first source/emitter-follower amplifier to drive the filtered positive differential signal, and a second source/emitter-follower amplifier to drive the filtered negative differential signal.
One of the drawbacks to using a switched capacitor circuit is that the operation of the switched capacitor circuit inevitably introduces a significant amount of switching noise into the differential analog signal processing stage. One approach to reducing the switching noise is to use an internal amplification stage that outputs differential signals to a differential switched capacitor circuit. An internal differential amplification stage eases the entire analog signal processing path design.
The differential switched capacitor circuit includes a positive switched capacitor circuit (a first switch, a capacitor, and a second switch) that is connected to receive the positive differential signal output by the first source/emitter-follower amplifier, and a negative switched capacitor circuit (a first switch, a capacitor, and a second switch) that is connected to receive the negative differential signal output by the second source/emitter-follower amplifier.
Although the differential analog signal processing stage substantially reduces even order harmonic distortion, amplitude and phase mismatches along the positive and negative signal paths introduce a substantial amount of even order harmonic distortion. Thus, there is a need for an approach to reduce the even order harmonic distortion in a differential analog signal processing stage.